XTRX Pro SDR
XTRX is the smallest easily embeddable software-defined radio (SDR). It is both affordable and high-performance. XTRX is designed to enable the next generation of wireless solutions, from prototype to production.
LTE modems and GPS receivers are commodity parts easily bought in any electronic components store and added to your project. On the other hand, everyone designing an SDR-based product had to spend precious time and money on a custom design – until XTRX.
Don’t waste your time designing yet another SDR. Embedding XTRX into your product is easy, freeing you up to focus on what your customers really need.
XTRX is the best platform available today for building SDR-based products. Designed with demanding embedded applications in mind:
Best-in-class Performance: 2 x 2 MIMO, 120 MSPS SISO / 90 MSPS MIMO, and more
Compact Form Factor: as a Mini PCIe card, it’s the smallest commercially available SDR
Thermal Coupling: well-designed thermal interface to a heatsink
Stable Clock: accurate enough for cellular standards
GPSDO: on-board GPS disciplined oscillator
Synchronized Clocks: share the same clock source across many boards
SIM Card Reader: appears as a typical USB serial SIM card reader
High-speed GPIO: 12 total, of which eight can form four matched LVDS lines
If You’ve Ever Cursed Your SDR…
XTRX isn’t for everyone. We expect most people interested in XTRX to already have some experience with SDRs. If you’ve never used an SDR before, XTRX might be a bit overwhelming for you. XTRX might be right for you if you have:
deployed SDR-based solutions in the field
wanted to develop a massive MIMO system only to realize you don’t have $1 million
cursed your SDR (or USB) for its latency, reliability, or cables
yearned to level-up your SDR skills with cutting-edge equipment
If this describes you, or you are looking for a better SDR, fear not and read on!
Here are just a few of the things you could use XTRX for:
Massive MIMO System
XTRX boards can share the same sampling and reference clocks, which makes it easy to build a massive multiple input, multiple output (MIMO) system.
Monitor Massive Amounts of Bandwidth
With synchronized clocks, multiple XTRX boards can collectively monitor very large chunks of the RF spectrum. For example, eight synchronized XTRX boards could monitor nearly 1 GHz of bandwidth.
The combination of XTRX’s accurate, stable clock, on-board GPSDO, and low-latency PCIe bus makes LTE possible out of the box.
Software-defined 2G/3G/4G Modem
When inserted into a Mini PCIe slot reserved for cellular modems, XTRX appears as a USB SIM card reader.
Drones and Embedded Systems
Power consumption, weight, size, and performance all matter when it comes to drones and embedded systems. XTRX’s Mini PCIe form factor and GPIO enable you to interface with a wide variety of single board computers, sensors, and actuators.
You can use the FPGA to accelerate your real-time signal processing; the high-speed, low-latency PCIe bus allows shuttling data back and forth between the host CPU and XTRX’s FPGA.
Features & Specifications
RF Chipset: Lime Microsystems LMS7002M FPRF
FPGA Chipset: Xilinx Artix 7 35T/50T (CS/Pro)
Channels: 2 × 2 MIMO
RF Output Power: 0 to 10dBm depending on frequency
Sample Rate: ~0.2 MSPS to 120 MSPS SISO / 90 MSPS MIMO
Tuning Range: 30 MHz - 3.8 GHz
10 MHz - 3.7 GHz
100 kHz - 3.8 GHz with signal level degradation
PCIe x2 Gen 2.0: 8 Gbit/s
PCIe x1 Gen 2.0: 4 Gbit/s
PCIe x1 Gen 1.0: 2 Gbit/s
Frequency: 26 MHz
Stability w/o GPS: 100 ppb or 500 ppb over the temperature range (depends on the XTRX version)
Stability w/GPS: <10 ppb stability after GPS/GNSS lock
Form Factor: full-size Mini PCIe (30 × 51 mm)
Bus Latency: <10 µs, stable over time
Synchronization: synchronize multiple XTRX boards for massive MIMO
FPC Edge Connector: four lines (usable as two diff-pairs)
Mini PCIe Reserved Pins: eight lines (including two diff-pairs, 1pps input, 1pps output, TDD switch control, and three LEDs)
Antennas + Cables
USB 3 Adapter with Aluminium Enclosure
PCIe x2 + Front End Adapter
Documentation & Sources
We’re publishig all XTRX-related code under thextrx-sdr GitHub organization. The most important repositories to note:
All XTRX-related code published under the xtrx-sdr GitHub organization. The most important repositories to note:
Documentation: connectors pinout, 3D models, etc.
Pre-built binaries and a “make world” instructions
Applications with XTRX support which is not yet merged upstream:
Why Mini PCIe?
We chose the Mini PCIe form factor for XTRX because it’s the best option for a high-speed, low-latency bus that is both physically compact and widely used. In other words, using Mini PCIe results in a device that is both high-performance and easily embeddable.
While it’s true that many laptops are moving away from Mini PCIe slots and toward M.2 slots, Mini PCIe is still the most popular PCIe form factor among standards-based, professional single-board computers (SBCs) and embedded systems. We will likely release an M.2 version of XTRX after the Mini PCIe version has been delivered.
We also considered USB 3 and Thunderbolt 3, but the former is high-latency and the latter is not yet very popular. However, should you want to use USB 3 or Thunderbolt 3, there are adapter boards for both.
The XTRX hardware itself is proprietary, though the hardware accessories we designed for it (e.g., the USB 3 and PCIe adapters) are open hardware.
XTRX’s main FPGA code is open source and without a viral license, so not only can you modify the code, but you can also develop your own proprietary FPGA blocks. The FPGA is approximately 30% utilized. We will share a detailed utilization report in a future update. You can upload your own firmware with our USB 3 adapter board or with a JTAG cable and our PCIe adapter board. If you are good at soldering, you can even solder JTAG directly to the XTRX board – that’s how we programmed our first samples.
Host Software & Drivers
The host-side software and drivers are open source.
We developed our low-level API to maximize performance (i.e., we’re using a zero-copy interface). We provide a SoapySDR interface to our low-level library, so you can quickly start developing if you’re already familiar with SoapySDR. For example, using SoapySDR plugins, you can easily get UHD support. Of course, there’s always the option to interface directly to the low-level API if you don’t want to use SoapySDR or need to eek out the most bandwidth and lowest latency.
The USB 3 adapter relies on a libusb wrapper, so it will work on almost every platform libusb works on. In contrast, PCIe communication requires a kernel-level driver for direct memory access (DMA) and interrupt handling. Our host library talks to a device provided by the kernel driver. Currently, we have an implementation for Linux only. A Windows driver is in early stages of development and will be released later. We don’t plan to develop PCIe drivers for other platforms right away. Our Linux kernel driver exposes TTY devices for GPS, UART, and SIM card UART, so you can use existing software, like gpsd and xgps. The adapter also provides a kernel pulse per second (LinuxPPS) interface for handling the lowest levels of jitter in NTP-like applications.